1. Field of Invention
Embodiments of this disclosure relate to methods of manufacturing a semiconductor device and, more particularly, to methods of manufacturing a nonvolatile memory device including nanowires or nanodots.
2. Description of the Related Art
A nonvolatile memory device retains data stored therein even when power is not supplied, and it is divided into a floating gate type or a charge trap type depending on a method of storing electric charges.
A floating gate type nonvolatile memory device includes gate patterns, each formed of a tunnel insulating layer, a floating gate, a charge blocking layer, and a control gate which are sequentially stacked over a substrate. The floating gate type nonvolatile memory device stores data by injecting or discharging electric charges into or from the floating gates. Accordingly, the floating gate functions as a substantial data repository and has a great effect on the characteristics of the memory device.
As the integration of memory devices increases a cell area is reduced, which may lead to increased interference between the floating gates of adjacent memory cells, resulting in a deterioration of characteristics of the memory device.
In order to alleviate this problem, a method of storing data using nanodots or nanowires is being proposed. It is, however, difficult to control the size of a nanodot or nanowire and the position where a nanodot or nanowire is formed in a process of forming the nanodots or nanowires. If nanodots or nanowires are applied to a memory device, memory cells can have different charge storage capacities because the nanodots or nanowires included in the memory cells have different sizes and different positions. As a result, the memory device malfunctions because the threshold voltages of the memory cells are differently when a program or erase operation is performed.